比較器

module top();

wire A_lt_B,A_gt_B,A_eq_B;

wire [1:0]A,B;

system_clock #100 clock_1(A[0]);

system_clock #200 clock_2(A[1]);

system_clock #400 clock_3(B[0]);

system_clock #800 clock_4(B[1]);

compare_2c X1(A_lt_B,A_gt_B,A_eq_B,A,B);

endmodule

module compare_2c(A_lt_B,A_gt_B,A_eq_B,A,B);

input [1:0]A,B;

output A_lt_B,A_gt_B,A_eq_B;

reg A_lt_B,A_gt_B,A_eq_B;

always @(A or B)

begin

A_lt_B=0;

A_gt_B=0;

A_eq_B=0;

if (A==B)A_eq_B=1;

else if (A>B)A_gt_B=1;

end

endmodule

module system_clock(clk);

parameter PERIOD=100;

output clk;

reg clk;

initial clk=0;

always begin#(PERIOD/2) clk=~clk ;#(PERIOD-PERIOD/2) clk=~clk ;end

always@(posedge clk)if($time>10000) #(PERIOD-1) $stop;

endmodule